Week by week
The programme is twelve weeks of weekly ninety-minute group sessions (six to eight students) and ten hours of one-to-one mentoring, followed by fabrication. The sequence is the same for every student; the project is their own. The worked example, Tick-to-Signal, shows how one project maps onto these weeks.
| Weeks | Focus | What happens |
|---|---|---|
| 1–2 | How logic becomes hardware | Gates, timing and the idea of a design that is “built” rather than “run”. First exercises in the browser studio; the AI assistant explains and checks. |
| 3–4 | Describing a design | From drawn logic to a hardware description. Simulation, test benches, and reading the results. The student’s question is chosen and scoped with the mentor. |
| 5–6 | The project, on an FPGA | The student’s design runs on a development board on their desk. Iteration, debugging, and the first entries of the engineering notebook. |
| 7–8 | Making it work well | Area, timing and power trade-offs; what will and will not fit on the allocated silicon; design decisions recorded as they are made. |
| 9–10 | Verification | Coverage, corner cases, and the checks the fabrication route requires. Mentor review and sign-off. |
| 11–12 | Documentation and showcase | Design document, disclosure statement and project page. Cohort showcase of the FPGA prototypes. |
| 13 | Fabrication | Designs are submitted together on two booked routes. Families receive the submission record and the expected return window. |
| +6–9 months | Silicon returns | Packaged chips and boards arrive. Measurement against simulation; results added to the project page. Outcomes-pack sessions begin for those who chose them. |
What a student produces
- A working FPGA prototype of their design, demonstrated at the cohort showcase.
- A complete design, entered, simulated, verified and checked for fabrication on the YSRP Studio, Magellan Global’s own AI-assisted design-automation platform—with no commercial EDA licence to buy.
- A design submitted for fabrication, and later the packaged chip with its development board.
- An engineering notebook recording decisions, failures and measurements as they happened.
- A design document in the format used by science fairs and student journals.
- A disclosure statement listing mentor and AI involvement, generated from the studio’s own records.
- A public project page (with the family’s consent) and a certificate of completion.
- A finished project in the form that science fairs, open-hardware robotics competitions and student journals expect—so the student can go on to the regional ISEF-affiliated fair, WRO Future Innovators or RoboCupJunior Rescue Maze, or a first publication, and, where the work matures into research, towards Regeneron ISEF and professional venues. Where the project can go, with eligibility ↗
The YSRP Studio and its AI assistant
Every design is completed on the YSRP Studio, Magellan Global’s AI-assisted design-automation platform for young designers. It runs in a browser and covers design entry, simulation, verification, FPGA programming, pre-fabrication checks, fabrication tracking and measurement reports, so a family never buys design software. The assistant inside it is built by the group with MTRI on the same principles as AKE, the group’s agentic knowledge engine, and it follows three rules. It explains before it generates, so the student understands a construct before using it. It records every exchange, so the disclosure statement is complete and the student can show what was their own. And it asks why: when a student makes a design choice, the assistant prompts them to write down the reason, and those reasons become the engineering notebook.
There is a fourth rule for competition work. The 2027 ISEF rules allow AI as a research resource when it is disclosed, but do not allow generative AI to write the research plan, the abstract, the poster or the citations. The studio therefore keeps the records, provides the structure and points out what is missing, and the student writes those documents themselves.
Beneath the Studio, the toolchain is open source end to end, so no student depends on a commercial licence, and the platform can be offered to schools and in any region at low cost.
Calendar
Cohorts are timed to the fabrication schedule so that every design goes out on a confirmed run.
| Cohort | Enrolment | Programme | Fabrication | Chips expected | Showcase & competitions |
|---|---|---|---|---|---|
| Spring 2027 | January–February | March–May | June | December 2027–March 2028 | Cohort showcase in June; local fairs from January 2028; outcomes-pack work on return of silicon |
| Autumn 2027 | July–August | September–November | Late November | June–August 2028 | Cohort showcase in December; national fairs and journal submissions from mid-2028 |
Dates follow the fabrication partners’ published schedules and are confirmed for each cohort before enrolment opens.
The YSRP Studio, in stages
Now. The browser edition: design entry, simulation, verification, FPGA programming, pre-fabrication checks, the AI assistant, the engineering notebook, a fabrication tracker, measurement reports and the project page. Nothing to install; a family needs a laptop and the development board we ship.
Next. A visual, game-like design mode in which younger students assemble and test logic as naturally as building in a sandbox game, with the same path to silicon underneath. Designing a chip should feel approachable before it feels difficult.
Then. A schools edition a teacher can run with mentor support, and an open registry of silicon-verified student designs that later cohorts can build on. The Studio is developed by Magellan Global with MTRI and the group’s Taipei engineering team, and it is the group’s long-term investment in making chip design something young people anywhere can do.
Who does what
Magellan Global leads the programme and the family relationship. MTRI co-develops the YSRP Studio and its AI assistant with the group and carries the research on how young people learn to frame problems with AI. The group’s Taipei engineering team provides mentors, fabrication coordination, packaging and measurement. AJPE supports families who wish to connect the project with education planning. WG Global arranges travel for the Taipei silicon week. LegalMatrix maintains the student intellectual-property policy: students keep the copyright in their designs and grant the programme a licence to showcase and, with consent, to include the design in the open registry.