Magellan — Discover the Future
YSRP · Frequently asked questions

Questions about YSRP.

Eligibility, fees, the fabrication timeline, the highest competition goals, AI and integrity, data and consent, and how YSRP connects to GSRP.

From a question to a working chip. Students design, prototype on an FPGA, fabricate on a shared wafer and measure their own silicon.
From a question to a working chip.Students design, prototype on an FPGA, fabricate on a shared wafer and measure their own silicon.
Who is YSRP for?

Students aged 12 to 17 with basic programming experience—Scratch, Python, a robotics platform or similar. The first cohorts keep the share of 12–13-year-olds limited while we confirm the pace suits them. No electronics or chip-design background is expected.

What does a finished project look like?

Read the worked example, Tick-to-Signal: a chip that turns a stream of market prices into a trading signal in one clock cycle, measured against a microcontroller and an FPGA. It shows what a student designs, measures, changes to make the project their own, and takes away. Every student’s project differs from it. The example is on the YSRP pages under “Example project”.

Is YSRP an introductory workshop, a mentor-led project or independent research?

All three, in sequence, and we say which weeks are which. Weeks one to four are the introduction. From week five every student designs and debugs their own function with a mentor reviewing, not directing. From week nine the student poses a question and measures their design against alternatives, which is the level science fairs judge, and the outcomes pack and research track take that as far as the work allows. The chip that returns is the student’s own design, tested against simulation. The research page sets out the four levels and who does what.

Will it fit alongside A-Level, IB or high school?

Yes. About four hours a week for twelve weeks, online and outside school hours, with cohorts timed around examination seasons where possible. No subject is required beyond basic programming; Mathematics, Physics and Computer Science make the project richer and the project gives them somewhere to go. The programme supplies the mentors, tools and fabrication, so a family does not have to assemble those resources, and we provide a letter for the student’s school.

How much of the work is the student’s own?

The design decisions, the hardware description or block assembly, the simulations, the measurements, the notebook and the written documents are the student’s. The mentor reviews, questions and signs off and is named in the disclosure statement. The AI assistant explains, checks, runs the tools and records every exchange; it does not design for the student and does not write competition documents. The disclosure statement is generated from the Studio’s own records, so a judge or a teacher can see exactly who did what.

Do students really design a chip, or assemble a kit?

They design it. Each student chooses a question, designs the logic that answers it, proves it on an FPGA and submits it for fabrication. The chip that returns contains their own design, selectable on the development board, alongside the designs of the rest of the cohort on the same shared silicon.

How much does it cost?

Indicative fees for the first cohorts are US$2,980 for the twelve-week programme including fabrication and the development boards, US$4,180 with the outcomes pack, US$2,800 for the optional Taipei silicon week, and school cohorts from US$14,000 per ten places. Fees are confirmed for each cohort before enrolment, and the silicon portion is refunded if both fabrication routes fail.

What is the time commitment?

About four hours a week for twelve weeks: one ninety-minute group session, one-to-one mentoring, and the student’s own work on the project. The outcomes pack adds roughly ten hours after the chip returns.

When does the chip arrive?

Designs are submitted in week thirteen and packaged chips return about six to nine months later, depending on the fabrication partner’s schedule. The programme is built so that the FPGA prototype, the showcase and the documentation are complete before the silicon arrives; the chip is the proof, not the prerequisite.

What if fabrication is delayed or fails?

Every cohort is booked on two independent routes. If one is delayed, the design moves to the other at no cost. If both fail, the family chooses between a refund of the silicon portion of the fee and a place on the next run.

Where is the chip made?

On shared multi-project wafers using mature 130–180 nm processes through partner shuttle services in the United States and Germany. Packaging, test boards and measurement are handled by the group’s engineering team in Taipei, and the group intends to add its own education shuttle with a Taiwanese foundry as cohorts grow.

Is AI allowed in competitions?

Yes, within rules that are tightening. The 2027 ISEF rules allow AI as a research resource when it is disclosed, but do not allow generative AI to write the research plan, abstract, poster or citations. The YSRP assistant explains and checks rather than designs, keeps a record of every exchange so the disclosure is complete, and does not write competition documents for the student.

Which competitions are the highest goals?

The top awards of the established international research competitions: Regeneron ISEF above all, with Regeneron STS, EUCYS, the Yau Science Award and Davidson Fellows where the student is eligible, and the Thermo Fisher Junior Innovators Challenge for US middle-school students. Among robotics competitions, WRO Future Innovators, WRO Future Engineers and RoboCupJunior Rescue Maze allow a student’s own hardware. For the rare mature project, a professional paper at FPGA, DAC, ICCAD or ICRA. No youth chip competition carries the weight of an Olympiad gold, and we do not claim one does.

Can my child’s chip be the brain of their VEX or FIRST robot?

Usually not. VEX V5 requires the V5 Robot Brain, and FIRST specifies the main controller while allowing regulated custom circuits, so in those leagues the chip appears as a sensing or co-processing module that measurably improves the robot. WRO Future Innovators and Future Engineers allow any controller, and RoboCupJunior Rescue Maze allows robots built from raw hardware; those are where a custom chip can be central.

Is there a track for ISEF-level awards or professional publication?

Yes, the research track. It is for the few students whose project has become real research, it follows the outcomes pack, and it is scoped and priced per project after a review of the student’s work. It is the only product we will not price on a list, because its value depends entirely on the work.

Do you guarantee awards or admission?

No. YSRP does not promise awards, publication or admission to any school or university. We describe outcomes at three levels of certainty and publish each cohort’s results once they exist.

Do we need to buy design software?

No. Students complete the whole design on the YSRP Studio, Magellan Global’s own AI-assisted design-automation platform, which runs in the browser and is built on open-source tools, so there is no commercial EDA licence to buy. Families need a laptop and the development board we ship, and students keep access to the Studio after the programme for their next design.

Can the finished project go on to competitions and programmes?

Yes—that is what it is built for. A completed YSRP project (a working chip, measured data, an engineering notebook and a design document) is in the form that science fairs, open-hardware robotics competitions and student journals expect. Students can go on to the regional ISEF-affiliated fair, WRO Future Innovators or RoboCupJunior Rescue Maze, or a first publication, with the outcomes pack or independently; mature research can aim at Regeneron ISEF and professional venues; and outstanding participants may later be introduced to GSRP-related internships. Eligibility depends on age and where the student studies, and we map it with each family.

What language is the programme in?

English, with Mandarin-language group sessions for the first cohorts in Singapore, Taiwan and Hong Kong, and for families joining online from elsewhere.

We live outside the regions listed. Can we join?

The programme is delivered online, so families in most countries can join a cohort, subject to shipping of the development board and local rules on online education for minors. For some regions we work through local education partners; contact us and we will confirm what applies to you.

How is my child’s information handled?

Under-18 students enrol through a parent or guardian account. We collect the minimum needed to deliver the programme, publish a project page only with consent, and use assistant logs for the group’s research only with separate consent. Travel for the Taipei week is arranged with WG Global’s specialists.

Who owns the design?

The student keeps the copyright. The programme receives a licence to showcase the project and, with consent, to include the design in an open registry that later cohorts can learn from.

How does YSRP relate to GSRP?

They are two programmes on one principle. GSRP develops enterprise-nominated successors and key people through AI capability, real work and international experience; YSRP does the same for students at the scale of a first project. Outstanding participants may later be introduced to GSRP-related internships and the group’s talent network.

Can a school run YSRP?

Yes. The schools edition supports a teacher-led cohort with mentor support, teacher training and a fabrication allocation. See the schools service guide or contact us.

Still have a question?

Write to us with the student’s age and location and we will reply with the next cohort’s details.

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